/*

 Signals (alphabet T):
 N - negative (-1)
 O - ground (0)
 P - positive (+1)
 Z - unplugged

 Special marks:
 ! - last value (used in simulation of memory)

 Unary blocks:
 MEM - memory cell
 BUF - buffer
 INV - inverter
 BLN - block negative (foreward diode)
 BLP - block positive (backward diode)
 PRP - pull-up resistor to +1
 PRO - pull-down resistor to 0
 PRN - pull-down resistor to -1
 CAO - comparator above O (>0)
 CAN - comparator above N (>-1)
 CBO - comparator below O (<0)
 CBP - comparator below P (<+1)

 Binary blocks:
 NOD - node (2->1)
 SOP - switch O-off P-on
 SPO - switch P-off O-on
 SNP - switch N-off P-on 
 SPN - switch P-off N-on  

 Schemes:
 BUF2 - buffer with 3 outputs
 INV2 - inverter with 3 outputs

*/

alf T=Z,N,O,P "Ternary alphabet for hardware implementation"

def MEM T:T "Memory"
 N:N
 O:O
 P:P
 Z:!
end

def BUF T:T "Buffer"
 N:N
 O:O
 P:P
end

def INV T:T "Inverter"
 N:P
 O:O
 P:N
end

def BLP T:T "Block positive"
 N:N
 O:Z
 P:Z
 Z:Z
end

def BLN T:T "Block negative"
 N:Z
 O:Z
 P:P
 Z:Z
end

def PRP T:T "Pull-up resistor to +1"
 N:N
 O:O
 P:P
 Z:P
end

def PRO T:T "Pull-down resistor to 0"
 N:N
 O:O
 P:P
 Z:O
end

def PRN T:T "Pull-down resistor to -1"
 N:N
 O:O
 P:P
 Z:N
end

def CAO T:T "Comparator above O"
 N:N
 O:N
 P:P
end

def CAN T:T "Comparator above N"
 N:N
 O:P
 P:P
end

def CBO T:T "Comparator below O"
 N:P
 O:N
 P:N
end

def CBP T:T "Comparator below P"
 N:P
 O:P
 P:N
end

def NOD TT:T "Node 2->1"
 NZ:N
 OZ:O
 PZ:P
 ZN:N
 ZO:O
 ZP:P
 ZZ:Z
end

def SOP TT:T "Switch O-off P-on"
 NO:Z
 NP:N
 OO:Z
 OP:O
 PO:Z
 PP:P
 ZO:Z
 ZP:Z
end

def SPO TT:T "Switch P-off O-on"
 NO:N
 NP:Z
 OO:O
 OP:Z
 PO:P
 PP:Z
 ZO:Z
 ZP:Z
end

def SNP TT:T "Switch N-off P-on"
 NN:Z
 NP:N
 ON:Z
 OP:O
 PN:Z
 PP:P
 ZN:Z
 ZP:Z
end

def SPN TT:T "Switch P-off N-on"  
 NN:N
 NP:Z
 ON:O
 OP:Z
 PN:P
 PP:Z
 ZN:Z
 ZP:Z
end

sch test "Test"
 >T i1 3,3
 >T i2 3,5
 +SPN obj 5,5 i1 i2
 <T o1 10,3 obj.0
 <T o2 10,5 i2
end